EGRE 306 Homework 7: Circuit Design and Transistor Analysis

School
Virginia Commonwealth University**We aren't endorsed by this school
Course
EGRE 306
Subject
Electrical Engineering
Date
Dec 12, 2024
Pages
9
Uploaded by PrivateIceEmu11
EGRE 306 Fall 2024 Homework #7; Due by on Saturday 10/12/24 on Gradescope by end of day Complete the following problems: 1.Problem 6.32 from the text
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2.Problem 6.35 from the text
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3.Problem 6.58 from the text
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4.
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4.Design the circuit below to establish IC =0.2 mA and VC= 0.5 V. The transistor exhibits vBEof 0.8 V at iC= 1 mA, and β=100.
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5. Using the circuit below (= 150), a) Determine which region of operation the BJT is operating in, and find the voltages and currents: VC, VE, VB, IC, IB, IE. b) If the circuit is in the saturation region, calculate forced. c) Change the 500resistor so that the transistor is operating at the EDGE of saturation. What is the new resistor value?
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6. Sketch the cross-section of an NMOS transistor, labeling the following regions/values: i) Source, gate, and drain contacts ii) Channel region iii) Label the doping types for all regions of the transistor iv) Indicate the voltages (polarities) at each contact that are needed to produce a current through the channel v) Indicate the direction of the current at the source, gate, and drain contacts **If the sketch is not easily read, you will not receive credit (neatness counts)**
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7. An NMOS transistor (Vt= 0.5V, k'n = 400A/V2) with a channel length of 180nm and a channel width of 1.385m is used as a variable resistor with resistance between 250 and 1k. Specify the range required for the control voltage (VGS) Show your work, explaining how you determined the range.
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