107計概midterm

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National Chengchi University**We aren't endorsed by this school

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CS 703820001

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Computer Science

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Dec 24, 2024

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e HAtR=%(11/13/2018) FH B 1:10~3:00pm. Closed book. 2y 05 298 0%b wig:_ tH = fié%t_fi’il_&__ FEE8H > Mi5r1005y - I. Multiple Choice: 45% B2k 4 >/ Identify the choice that best completes the statement or answers the question. O,\Z @ In a computer, the subsystem serves as a@@ of the other subsystems. a. ALU ¢. memory b. input/output /d. control unit 2 mm’)ﬂl\je}’ 0{— "H’l@/ 5'“’9\(1 _L_ 2. The precision of the fractional part of a number stored in a computer is defined by the ; A lesw ol CXBOREN, g g T o Tt V/e. mantissa - the, Fmo,gmrv fra(/t,‘on 0[, fﬂ ! b, sign ST Ty RN d. last digit (i o "0/ The, Floating -poift, number : 3. A floating-pgint value after normalization is (1.0101) x 27*. What is the value of eficpg}e)t d’eﬂ'\ N section in the Excess_127 representation? @ the g,x&one‘,n% pary is a 4 ; c. 127 G a5 12, b 4 Bras- 7f v 123 ~¥HITEP3 e [ |0 | = 4P o.p $ V\ \/)L) ¥ b+ % N . s hT#3p +1b s ON 4. Convert the decimal numbers (-179) to.f(%/—hi' two’s)comp_l;e_r_nemm[sggr: 3 a 1111111101001101‘(‘V‘,? o0 o] \c\fUOOOOOOIOIIOOII \0000000010110011‘ N 1111.111110110011 (oooauueolo ltoo) 1)y 5. Two intege(s A and B are stored ix}&gg@pd-ma nitude format. g s, (1) A= (0 0010061)2 1) B=(100101102 ()77 n--A (*22) =39 What will be the result for A - B in sign-and-magnitude format? N ees Hio]), g 00100111 1rl=/) =C,0) (3) ~s 01111111 O 1 b _overflow St vt b s = 34 810000101 ST ) 6. Which of the following operations creates an if the numbers and the result are (1L B-bit two’s complement rl represented i presentation’ | s 9 \Webdbore 1Veouoro Sa; 11000018+0011 111 ol 1o 311000010+ 1T *oonvv e iy \h\00000010+00¥£\ll] [ <@. 10000010+ 10000010 ©0essvoot |jascco ! L' 7. If the memory address space is 16 MB and the word size is%bits, then bits are needed to access each word. b 7 5% ( \“1*") e Q@ 4 -9((,-?8:?47‘(,,3 b. 16 5 16 Mbytesy, 32 o YR . > <§) A computgr uses fsolated I/0 addressing. Its memory has 1024 words. If each controller has 16 registérs, how many controllers can be accessed by this computer? —— A a. 16 3 MRy w \J. 64 oo 62 i N SRR oo T el . |1ooo0lo (-6 - TR I [ooooolo (-13) .> A 0 looooelo (-1)() it jJ SR — ‘ 9 ) FIE/H 8 H (124=2 0¥ AT s =2 b g FVFTAT <5 -y

I 9\ Q.. Which statement is@cin:%i7 va. For the programmed?/O method, the CPU constantly checks t'he status Qf the I/O device, and the CPU time will be wasted for checking the device status if the device is not ready. ) y Vb, In the interrupt-driven /O method, the CPU can do something else while the slow 1O device is finishing a task. ~ ¢**3r*"* ¥ ¢. For CISC (complex instruction set computer) architectures, programmers do not have to write a set of instructions to do a complex task. o : v, d. For RISC (reduced instruction set computer) architectures, programlmng is easfer and time-saving than in the CISC. 3 2 R 5@\}'{‘ groqmer “% M— @ The __layer of the TCP/IP protocol suite is responsible for sourge/-t‘o,-_d\e’sﬂganon delivery of the entire message. a. transport c. data-link « b. network — The n(;f/WWl‘ d. physical [2 A_ 1? Which statement is ? Iﬂj £ vl & 5=.98% b a. Both TCP and UDP are transport-layer protocols. 2 \ _w/Pmag 5 comily b. The delivery of packets at the network layer is unreliable. FI’DL@”’ T Ve. Communication at the data-link layer is node-to-node; not end-to-eya./_’) (‘f"""f"f/ /47@)9 C’F ¥d. The physical layer provides process-to-process communication. vep R S UAY Townsprrt e i 12.b Which statemen\t is egarding/;he multiprogramming techniques? >/ hy slcal / ayer. : Frans mig1on a. With partitioning techniques, each program is entirely in memory and occupying contiguous locations. (P ATk rlion X b. Paging and segmentation are (iL ilar techniques, except that the péy‘es)maxch the programmer’s view. ( Yeh't ¢. Demand paging and demand segmentation belong to swapping category. d. Demand paging and segmentation can be combined to further improve the efficiency of the system. O\_@3. -The scheduler moves a process from one process state to another. a. process Se._ virtual ¥ b job d. queue 'f?h& PI'OC@% 50;76/(4/8}" Vol w o e 14. Which one of the followings is an .@ transition of process states? y S . Va. running - ready Ve, waiting > ready l’éd:(/,i__ l’Mﬂ”/l\lf * b. ready - waiting Vd. running - waiting /L WfitTVg 4_} Ce415: “To prevent , an operating system can put resouree restrictions on processes. a. paging Q deadlock = b. synchronization d. starvation l/ To Frel/e,nb %th Yoniza‘tfoh/ FH/EBH b —— . e ———

- 1L. Problem: 55% 1. [10%) ges (a) [2%)] Convert the following binary number to decimal: ~ (01101)2 (b) [2%)] Convert the following binary number to decimal: (01 i1 10.01) (¢) [2%] Convert the following decimal number to binary: ~ 14.625 (d) [4%)] Convert the following decimal number to the 32-bit IEEE excess_127 format (1 bit for sign, 8 bits for exponent, and 23 bits for mantissa. ) : -12.625 )O e B W (onol)y = (l’))w‘g gy >\ 0§ \/ ¥ (onitio. 0y ), = (29.95) W W tbs) s Frd e + o5+ oy = (0 T101), " ) -)1—.5)’)’:-(“09.“)\)» ;-(\,\ovlo\)»,)_‘i B(yomvb'—}*)/) 5 2 M 2\ %0 - ( 100000\ v \00\6)0b0D0 000000000 600 W B 2. [4%] ‘}? What steps are needed to convert audio data to bit patterns? (b) An audio signal is sampled 8000 times per second. ~Each sample is represented by 256 different levels. How many bits per second are needed to represent this signal? 5 @ g G Y Bk R LR 0 AN 5 0 W%MVLUS ® %\M.,\H;L‘Unk @e,hm.)i'\‘} . — ’ ). sk 2T 9 —ha Sample g 8w ) ywo semples |V WG B G Rooox ¥ = buooo )17-15# 5 L s FIH/H 8 H

3. [9%] An different (2) What ig (g; OWing forma. o Rzan add instructiop in@ if a typical instruction yses the Maginary Computer has 14 data registers (ROto R] 5), 1024 words in memory, and ¢ d, Subtract, and S0 on). hat is the size of the i instry aLis the size of the ction register in this computer? rogram counter i this col ? prog am cous mputer by TR Ao needs & Mg *‘/P“b w te instuchon se - ey oY [CVRN ATIN N deyerdy o, e ™ pddnsses h . which (. b LI LI, needs o *Tw [10%] The following computer use: S one cycle per instruction, The cycle is normally made up of three steps: fetch, decode, execute. Memory o Fetch o Decode OExeculc Ry 4—— M4 | Decoding of (1040), ¢ Show e for the computer if the first cycle is as the following figure. Registers Ry 00Al —0—+ R 1 R, > 1040 00 FefT—————t 1141 o1 3201 02 Ris 2422 03 et | 0000 04 Q- S e oAl 40 PC| 00 P S| e Lol 00FE 41 ontrol u IR 1040 ~= 4 FAH/HESH S B

F e il =) Notice that the list of instructions for this computer s as follows: N =¥ i - Instruction Code Operands Action d' d) d) dl HALT 0 Stops the execution of the program LOAD L Ry M RD — M, STORE 2 M, R M, <R 00! B Ro |Ra R, Ry <Ry +Ry ADDF 4 R, |Ry R, Ry« R, +R, MOVE S Ry R R, R NOT 6 R, Rs R, R, gD 7[Ry Ry [Rg R, < R, ANDR,, OR 8 Ry [Ry [Rg R, < R;, ORR,, XOR 9 Ro [Rey Ry R, < R, XORR,, INC A R- Ré—R+1 DEC B R R & R-1 ROTATE (o R n Oor1 Rot R JUMP D R n IF R, # R then PC = n, otherwise continue Key: R, R“, Ry Hexadecimal address of source registers R,: Hexadecimal address of destination register M,: Hexadecimal address of source memory location M,: Hexadecimal address of destination memory location n: hexadecimal number d,, d,, d,, d;: First, second, third, and fourth hexadecimal digits [ fo %%EK 03[ oo 'Y D Fetck © 4UAL R (00)10 %5 nstchon AR IR : i Decode = B W wometion 14 ,U;A, ¢ Rob— My | e Joidh 7C ol I\ = Temte - ?Mx, A Mo W Ro - IR muyl Comtrml | Uiy Mlmc"j © Fetch + LALLM () (035 chon HRLE R 2 -t e Ml Vecode ol T W ingtvwctiug Wi R 2 Re— My P P © Treadte : 345, %5 Jaw load 39 KR, 4275)44{’5 5 E=VE 3=}

©) Bih + Wy (0))” ¥ inshuchon 44 A K Cf Decode - By W nswction 56 EP4 . Ry Kot K Breade - BUT, HE R n%ma E RS Fow é’ Feh = # (03) 0 o8 inghuchon 44 ¥ 2R Decode = ‘»# é; W onstmchion gy 11}\1}» s Muy — Ro Bemte AT KK s W py, @ Feteh - W (%) ¥ nshuction Ry IR Peode : B K W imsion W £ B A Palt Treade = %U‘i 3 'fé Lk oexeution of Hhe progrem Regioters , @ o oo\ > x 00 B[ oory |- - v, o g o\ = | 2o\ | oy T | o) . — . gl (23] = i dlS /Memuy3 0000 | o\ ) IR oopo) « | ® ! FOH/HE8H | Hal | HALT . @y w’ e = . =5 e T T . =

5. [6%] Match the following to one or more layers of the TCP/IP protocol suite: (a) route determination (b) responsibility for handling frames between adjacent nodes () transforming bits to electromagnetic signals \/ / @) Neb- woyk lagor | Vi ymwj @ &) Dotan - 1ink Lm&w\/‘g nedes - o - poder @) W\Jfiw\ \my/y (/%1\41& a%. 6. [4%] (a) What is the “protocol” in computer networks? (b) What is the purpose of the “DNS” (Domain Name System)? ) Fro-hcs\& &;Péf«,{ zfifi Za z@fifi’§1“,€i4’; 4 Ty fi»iz »&AM&%%Q o s w%mm»fi w@zm%fivéfi Z A Be o2 54 R NS _,&ggx_m L DS VS A, 55 A B B Ak 54 7. [4%] How is demand paging more efficient than regular paging? Demond peging V3 A pghy - AR B pges B s, 43 sop AN, DARARAD B pages KB B Haa-dak, 1% 8 rf) poyes LN N"“mj- 2% By progren 128 P9 st Rl Tt g R4 BE RN nemy spece. wmoV\S g L FIH/%8H

8. [4%] A multiprogramming operating system uses paging. The available memory is 60 MB divided into 15 frames, each of 4 MB. The first program needs 13 MB. The second program needs 12 MB. The third program needs 27 MB. (a) How many frames are used by the first program? (b) How many frames are used by the second program? (c) How many frames are used by the third program? (d) What is the total memory wasted? @) .%-, 355 9 4 Jamer OI’)-/Y7>7—) Y FHemds - &) %pb.?? - /) Frames L ) AR Fmes § AD TS pehory. HHAR 3 15-(443+9) =1 fome . e 9. [4%] Three processes (A, B, C) are running concurrently. ~Process A has acquired Filel, but needs File2. Process B has acquired File3, but needs Filel. Process C has acquired File2, but needs File3. Draw a diagram for these processes. Is this a deadlock situation? Explain briefly. File 1 frocess »\17 YM Troess B & Prwess nee dy File % Fik > Kot poess HpREAWBLE Y Fe MERKTE By, FYBAD o, Mb- D dedlek stuakion, D A b.c =4p prers BEAAW BL TR Ble MR ARG By v Je ) ¥ A7 7S B A7 BOAK A A s T Uk MAT, T~