DLD LAB 09

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School

U.E.T Taxila**We aren't endorsed by this school

Course

EE 234

Subject

Electrical Engineering

Date

Jan 7, 2025

Pages

Uploaded by saadnadeem315

Lab 09TopicHalf adder, Full adder, Half Subtractor, Full SubtractorSoftwareCircuit Maker 2000logic.ly (Web Source)ComponentsIC Type 7408 QUAD two input AND gateIC Type 7400 QUAD two input NAND gateIC Type 7432 Two input OR gateIC Type 7402 QUAD two input NOR gateIC Type 7486 QUAD two input XOR gateIC Type 7404 HEX one input NOT gateObjectiveTo understand working of Universal gatesTo study the basic operation and design of half adder, full and parallel adder circuits.To Validate the above implementation using Circuit MakerNameReg No.

Task 1:a)Draw a truth table for half adder. Clearly mention all inputs and outputs.b)Draw the block diagram and circuit diagram for half adder (on page).BLOCK DIAGRAM:CIRCUIT DIAGRAM:

c)For both CARRYand SUM, write standard SOP Expression.d)For both CARRYand SUM, write the Minimized SOP using K-Map grouping techniques.e)For both standardand minimized expression, implement half adder (Combined Circuit) on Circuit Maker and verify the results.STANDARD:

MINIMIZED:Task 2:a)Draw a truth table for full adder. Clearly mention all inputs and outputs.b)Draw the block diagram and circuit diagram for full adder (on page).A:ABCinSumCout0000000110010100110110010101011100111111B:

c)For both CARRYand SUM, write standard SOP Expression.ANS: Standard Sop for Sum: A’B’Cin + A’BCin’+ AB’Cin’ + ABCinStandard Sop for Cout: A’BCin + AB’Cin + ABCin’ + ABCind)For both CARRYand SUM, write the Minimized SOP using K-Map grouping techniques.

SUM: 0 1No groups of 4 possible.Four groups of 1: (A'B'Cin), (A'BCin'), (AB'Cin'), (ABCin).1.Minimized SOP for Sum:Sum=A′B′Cin+A′BCin′+AB′Cin′+ABCinMinimized SOP = A'B'Cin + A'BCin' + AB'Cin' + ABCinUsing XOR logic:Sum = A⊕B⊕CinCARRY: 0000010111111001Group of 2: (A·B)Group of 2: (B·Cin)0001011011011010

Group of 2: (A·Cin)Minimized SOP for Cout:Cout=AB+BCin+ACine)For both standardand minimized expression, implement full adder (Combined Circuit) on Circuit Maker and verify the results.Task 3:a)Draw a truth table for half subtractor. Clearly mention all inputs and outputs.ABDIFFBORROW0000011110101100b)Draw the block diagram and circuit diagram for half subtractor (on page).c)For both DIFERENCEand BORROW, write standard SOP Expression.

Standard SOP Expression for Diff:Diff=A′B+AB′Standard SOP Expression for Bout:Bout=A′Bd)For both DIFERENCEand BORROW, write the Minimized SOP using K-Map grouping techniques.DIFFERENCE: 0110Two groups of 1: (A'B) and (AB')Minimized SOP for Diff:Diff=A′B+AB′Simplified using XOR logic:Diff=A⊕BBORROW:01

00Grouping:Single group of 1: (A'B)Minimized SOP for Bout:Bout=A′Be)For both standardand minimized expression, implement half subtractor (Combined Circuit) on Circuit Maker and verify the results.Task 4:a)Draw a truth table for full subtractor. Clearly mention all inputs and outputs.ABBinDIFFBout0000000111010110110110010101011100011111b)Draw the block diagram and circuit diagram for full subtractor (on page).

c)For both DIFERENCEand BORROW, write standard SOP Expression.Standard SOP for Difference:Diff=A′B′Bin+A′BBin′+AB′Bin′+ABBinStandard SOP for Borrow:Bout=A′B′Bin+A′BBin′+A′BBin+AB′Bind)For both DIFERENCEand BORROW, write the Minimized SOP using K-Map grouping techniques.DIFFERENCE:01100110Grouping:Four 1's: (A'B'Bin), (A'B Bin'), (AB'Bin'), (AB Bin)Minimized SOP for Diff:Diff=A⊕B⊕Bin

BORROW: 01110101Grouping:Group 1: A′B′BinGroup 2: A′BGroup 3: AB′BinMinimized SOP for Borrow:Bout=B⋅Bin+A′⋅B+A′⋅Bine)For both standardand minimized expression, implement full subtractor (Combined Circuit) on Circuit Maker and verify the results.