EE5502 Assignment 3
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School
National University of Sciences & Technology, Islamabad**We aren't endorsed by this school
Course
ELECTRICAL EE5135
Subject
Electrical Engineering
Date
Jan 11, 2025
Pages
2
Uploaded by jackinsing
1 Nov 2024, Sem 1 2024/25, NUS EE5502 MOS DEVICES Assignment 3 Q1. One student fabricated two n-channel MOSFETs (A and B) on the same substrate (NA=1017cm-3) with the same process and layout. The student measured the threshold voltage (Vt) at a drain current of 100 nA. MOSFETs have the same subthreshold swing but the threshold voltage of 0.35 and 0.3 V are measured at a drain bias of 5 V for device A and device B respectively. It is known that both device A and B have W and L of 1 m and 1 m, gate oxide (SiO2) thickness of 10 nm. Assuming the electron mobility of 500 cm2/(Vs). You may ignore the interface states and short channel effects. (1) Determine the sub-threshold swing of the MOSFETs. (2) Calculate the On current of Device A and B measured at VGS=VDS=5 V. (3) Calculate the Off current of Device A and B measured at VGS=0V and VDS=5V. (4) Calculate the On/Off current ratio for both devices biased at VDS=5V. Briefly comment on the results. Q2. As discussed in lecture, the threshold voltage roll-off of short channel device is one of the most important issues for sub-micron device. You have 3 parameters (oxide thickness (Tox), substrate doping concentration (Na), and S/D junction depth (Xj)) to improve the short channel effects, i.e. minimizing charge-sharing effect and DIBL (Drain Induced Barrier Lowering). How do you control these 3 parameters, increase or decrease them? Why do you want to increase or decrease them? Explain your answer clearly. Q3. MOSFET devices A and B are identical except with different channel length and channel width. The output Id-Vd characteristics under same gate overdrive for device A and B are shown in below figure. Determine which device has the shorter channel length and which device has the narrower channel width. Explain your answer clearly.
2 Q4. Suppose one scales the oxide thickness of an n-MOSFET by a factor of 3 (say from 12nm to 4nm) with all the other device parameters constant. Do you expect that IDS,sat of short channel transistor for a fixed (VGS-VT) to be increased by a factor of equal to, more or less than 3? Explain your answer clearly. Q5. MOSFET device A is identical to device B except that the substrate doping concentration of A is higher than that of B. Considering the drain induced barrier lowering effects, sketch the log(IDS) vs. VGScurves with small VDS for both devices. Also, on the same figure, compare the log(IDS) vs. VGScurve of device A for large VDS. Q6. An n-MOSFET has a current drive capability of IDS,sat = 3 mA at VGS = 2 V. Calculate the velocity of the carriers in the channel near the source. And, find the corresponding lateral electric field near the source. Drift velocity can be assumed to be saturated at 107 cm/sec for electron. You may use following information; μeff = 500 cm2/Vs, VT = 0.5V, channel width = 10m, channel length = 0.5 m, gate oxide thickness = 5 nm, permittivity of free space (εo) = 8.854×10–14F ⋅cm–1, relative permittivity of gate oxide (εr) = 3.9. Hint: use two region piece-wise model for velocity saturation of carrier. IDSVDS,sat, AVDS,sat, BVDS